Job Description
This optical transceiver hardware job in Bangalore is with Intel. You will design the circuit boards inside high-speed optical transceiver modules and their test boards. The modules cover 800G and 1.6T standards used in data centres.
At a glance
- Position: Hardware Engineer, experienced hire (requisition JR0286975)
- Where: Bengaluru, India; hybrid work model
- Degree: BE/BTech + 6 years, ME/MTech + 4 years, or PhD + 2 years, in EE or a similar field
- Posted: 18 September 2026
- Apply: open until filled (re-checked 30 October 2026)
What the optical transceiver hardware engineer does
- Design module and evaluation boards: schematics, circuit simulation, PCB guidance, DFM review and design verification
- Own the board design for 100G and 200G per lane modules, including power delivery for high-speed DSPs and RF chips
- Meet optical MSA specs such as 800G DR8/2xFR4, 1.6T DR8/2xFR4, 800G LPO and 1.6T LRO
- Work with signal- and power-integrity engineers on 100G and 200G NRZ and PAM4 links
- Choose DSPs, drivers, TIAs, microcontrollers, DACs, ADCs and regulators
- Lead design reviews, keep specs and BOMs, and debug boards from concept to EVT/DVT
Why this role matters
AI data centres move huge amounts of data between chips over optical links. Each jump from 800G to 1.6T needs cleaner boards and tighter power delivery. This role puts you at the electrical heart of those optical modules, working next to photonics engineers.
What Intel is looking for
- Bachelor’s with 6+ years, master’s with 4+ years, or PhD with 2+ years, in Electrical Engineering or a similar STEM field
- 3+ years in circuit and schematic design and layout floor planning, using Cadence tools
- High-density, high-speed multilayer board design (25–50G NRZ, 100G PAM4 and above)
- Component selection for regulators, microcontrollers and data converters
- Board bring-up, and lab optical and electrical measurement
- Knowledge of SPI, I2C, MDIO and the CMIS interface for optical modules
Nice to have
- Work with high-volume PCB and substrate fabs, and stack-up choice
- PI and SI simulation
- Transceiver or test-board design: crosstalk, noise, ESD and firmware
- Using an AWG, DCA or VNA/LCA to measure high-speed performance
Pay and location
The posting does not state pay. It is a full-time role in Bengaluru under Intel’s hybrid work model, which splits time between the Intel site and working off-site. Intel says it never charges candidates any fee during hiring.
How to apply
Apply through the official Intel job posting. Intel’s posting does not give a closing date, so the role is open until filled; ResearchJobs.in will re-check this listing on 30 October 2026. Check the posting for location and work-authorisation details before you apply.
See all our industry R&D jobs, or browse more research jobs on ResearchJobs.in.
Hiring institution: Intel
Official advertisement: intel.wd1.myworkdayjobs.com
How to prepare for this application
- Bring one board you designed and explain its stack-up, key high-speed nets and how you verified them
- Revise PAM4 signalling, eye diagrams, insertion loss and crosstalk budgets
- Read the 800G and 1.6T MSA summaries (DR8, FR4, LPO) so you can discuss their electrical specs
- Be ready to talk about power-delivery design for a hot DSP: decoupling, ripple and transient response
- Know the CMIS management interface and how a host talks to an optical module
About Intel
Intel is a US semiconductor company that designs and makes processors and other chips. It runs a large engineering centre in Bengaluru. This role sits with Intel's optical transceiver work, which uses silicon photonics.