Research Engineer, AI for Chip Design at OpenAI (San Francisco)

Job Description

OpenAI is hiring a research engineer in AI for chip design. The team uses reinforcement learning, tool use and evaluation to help AI models solve semiconductor design problems. These include RTL generation, design verification and physical design. The role is based in San Francisco with hybrid working.

At a glance

• Position: Research Engineer, AI for Chip Design (Research department)
• Where: San Francisco, California, USA; hybrid
• Pay: $380,000 to $500,000 a year, plus equity
• Apply: open until filled (re-checked 31 October 2026)

What the AI for chip design research engineer does

• Build RL environments and evaluations for RTL generation, design verification and physical design optimisation
• Help models use chip-design tools to improve power, performance and area while keeping designs correct
• Design experiments, set baselines and test whether gains hold on new tasks and designs
• Investigate failures in model behaviour, rewards, evaluation tools and infrastructure
• Speed up iteration with better tooling, faster evaluations and proxy rewards
• Turn successful experiments into reusable research code and training workflows

Why this role matters

Chip design takes years and large teams, and verification alone eats much of that time. If AI models can write and check hardware designs reliably, design cycles could shrink sharply. This team works on that with real EDA tools and strict correctness checks. Prior chip-design experience helps but is not required; you can learn it from the team’s hardware specialists.

What OpenAI is looking for

• Strong programming and debugging skills, with a record of turning ideas into working software
• Experience with reinforcement learning, model evaluations, post-training or other applied ML research
• Experience building tool-using agents, reward functions or automated evaluation systems
• Clear hypotheses and careful experiments that separate real results from noise
• Independent work on open problems, and clear communication across research, software and hardware

Nice to have

• Experiment orchestration, distributed training or research infrastructure
• RTL, Verilog or SystemVerilog, EDA tools, formal verification or chip-design automation

Pay and location

The posting gives an annual salary of $380,000 to $500,000, plus equity. The role is hybrid in San Francisco. The posting says that to comply with US export control laws, candidates may need to meet certain legal status requirements.

How to apply

Apply through the official OpenAI job posting. OpenAI’s posting does not give a closing date, so the role is open until filled; ResearchJobs.in will re-check this listing on 31 October 2026. Check the posting for location and work-authorisation details before you apply.

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