chip design Archives - Page 2 of 2

Showing 11 – 20 of 20 results

Analog Design Engineer (PLL, LDO, ADC) at Intel (Bengaluru)

Engineer, Industry R&D

Karnataka

Full Time

ASIC CAD Engineer, Clocks Methodology at NVIDIA (Bengaluru)

Engineer, Industry R&D

Karnataka

Full Time

Senior ASIC Power and Thermal Engineer at NVIDIA (Bengaluru)

Engineer, Industry R&D

Karnataka

Full Time

ASIC Verification Engineer, Clocks at NVIDIA (Bengaluru)

Engineer, Industry R&D

Karnataka

Full Time

Lead Engineer, Yield Analysis (Memory Fab Data) at Micron (Hyderabad)

Data Scientist, Engineer, Industry R&D

Telangana

Full Time

Senior Engineer, Analog Mixed-Signal IP Verification at Micron (Bengaluru)

Engineer, Industry R&D

Karnataka

Full Time

Principal Engineer, ASIC Design Verification at Micron (Bengaluru)

Engineer, Industry R&D

Karnataka

Full Time

Senior Memory Design Engineer (DRAM, AI-assisted Design) at Micron (Hyderabad)

Engineer, Industry R&D

Telangana

Full Time

Staff Engineer, Analog Design (DRAM Power Management IP) at Micron (Hyderabad)

Engineer, Industry R&D

Telangana

Full Time

Principal Engineer, HBM Design Verification at Micron (Hyderabad)

Engineer, Industry R&D

Telangana

Full Time

Analog Design Engineer (PLL, LDO, ADC) at Intel (Bengaluru)

ASIC CAD Engineer, Clocks Methodology at NVIDIA (Bengaluru)

Senior ASIC Power and Thermal Engineer at NVIDIA (Bengaluru)

ASIC Verification Engineer, Clocks at NVIDIA (Bengaluru)

Lead Engineer, Yield Analysis (Memory Fab Data) at Micron (Hyderabad)

Senior Engineer, Analog Mixed-Signal IP Verification at Micron (Bengaluru)

Principal Engineer, ASIC Design Verification at Micron (Bengaluru)

Senior Memory Design Engineer (DRAM, AI-assisted Design) at Micron (Hyderabad)

Staff Engineer, Analog Design (DRAM Power Management IP) at Micron (Hyderabad)

Principal Engineer, HBM Design Verification at Micron (Hyderabad)

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